There was a "slimmed down" Athlon for the Socket 462, with a quarter of the L2 cache (64 KB) - also known under its codename of Spitfire. This meant that the L1 cache - at 128 KB - was twice the size of its L2 cache. The transistor count was 25 million and it was manufactured using the 0.18-micron process. The bus speed was 100 MHz from the outset.

It made life difficult for the Intel Celeron 700: AMD Duron 650 with Spitfire core.

Duron 900 to 1300: May 2001 to January 2002

The enhanced version of the long-running Intel Celeron (II) competitor was based on the Morgan core and included new features such as SSE extensions and 3DNow+. The transistor count rose to 25.18 million and fabrication was based on the 0.18-micron process. Bus speed remained at 100 MHz.

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